Dimensions
12 HP
22 mm deep
Current Draw
18 mA +12V
0 mA -12V
0 mA 5V
Price
$115 Price in €

Available as an assembled Module and as a DIY project.

This Module is currently available.

Edge Detector 12hp

8-channel gate-to-trigger with OR-combined outputs

8-channel rising edge detector aka gate-to-trigger converter.
Also has OR-combined outputs for ODD, EVEN, and ALL channels, 'enable' inputs for gating/muting the OR-combined outputs, and input normalisation scheme for generating separate pulses for both the rising and falling edges of input signals.

The left column of input jacks are fed to comparators that turn any signal that crosses approx. 0.5V into a binary high or low state (you don't need to feed it gates, it'll take any typical synth signal).
The rising edge of this high state triggers a short pulse on that channel's output.
In this 12hp version the maximum pulse length for each channel is adjustable with a pot on the panel from roughly 5ms to 500ms (I also made an 8hp version with fixed trigger length)
I say maximum pulse length because the output pulse will be cut short if the input goes low first. In this case the frequency of output pulses will keep up with the inputs to ensure no rising edges are lost even when running the module at audio rates.
This module can not lengthen trigger signals.

With nothing plugged into the even-numbered channels they output a pulse on the falling edge of the signal plugged into the odd-numbered channel above them.
OR-combining the rising and falling edge pulses of a 50% duty cycle gate signal gives you pulses at double the input tempo/frequency which can be handy?

The right side of the panel has logic OR combined outputs for the odd-numbered and even-numbered channels, and the combination of those two labelled ALL.
The ODD and EVEN circuits have an 'enable' input that is normally high with nothing plugged in. Patching a signal to these inputs means the combined output pulses only make it to the ODD or EVEN output jack when more than approx. 1V is present on their respective 'enable' input.
Think of the ODD and EVEN outputs as a 4-input OR gate followed by an AND gate with the enable signal.
The ALL output is the logic OR of the ODD and EVEN outputs so the enable inputs affect it, too.

https://isaacbeers.square.site/product/edge-detector-12hp/19


submitted Sep 15th, 01:15 by isaacbeers | last Change Oct 20th, 05:19 by isaacbeers
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