This Module is currently available.
Trig to gate, trig delay, rampe genrator
The TIME convert a trigger signal (any signals) into a gate signal.
There are all the necessary I/O to completely controle an ADSR enveloppe (think retrig.).
It can be used as:
- Clock generator, trigger delay, rampe generator, and more.
And with CV controle over the time.
Gate Output, Start trig output, End trig output.
Reset (RST) input to force the end of the gate.
CV input for the time parameter.
Push button for IN and RST.
Loop mode: use the module as a clock generator.
0 to 8V ramp, Following the duration of the gate.
Optional connector to add the RITOURNELLE Shift-R: adding 8 gate outputs, works like clock divider.